The full course structure behind this project — six modules, thirty sessions, from the anatomy of a supercomputer to quantum computing. The MiniWeather 7-point stencil solver in this repository is the hands-on companion: a concrete place to see MPI, OpenMP and CUDA from the syllabus actually run.
An introduction to high-performance computing with a modern perspective: parallel coding, distributed systems, and applications in machine and deep learning. It covers the evolution and fundamentals of HPC, architectural design, resource management and performance optimization, with heavy emphasis on the parallel-programming essentials — MPI and OpenMP — plus GPU computing and cloud-based HPC. The curriculum builds toward distributed ML/DL at scale and closes on the frontiers of the field: neuromorphic, quantum, and post-exascale computing. Theory alternates with hands-on sessions; the MiniWeather stencil project is one such hands-on artefact.
The course is built around six competency themes. By the end, students command HPC hardware and software, the major parallel paradigms (MPI, OpenMP, OpenACC), performance measurement and optimization, and an informed view of where supercomputing is heading.
Explore the evolution, principles and architecture of HPC systems; understand resource management, performance metrics and the dynamics of parallel systems; set up environments and write simple parallel codes, with cloud-based applications in health and neurosciences.
Master distributed vs. shared-memory concepts, MPI programming and OpenMP multithreading; a special focus on GPU computing and OpenACC/CUDA, integrating MPI with OpenMP for complex simulations such as CFD.
Optimize code for diverse HPC architectures; use profiling and analysis tools; exploit the memory hierarchy and data locality; leverage high-performance libraries, parallel I/O and data-management strategies.
Design scalable parallel algorithms for big data, high-performance data structures and visualization; understand distributed ML and scalable deep learning, culminating in a distributed-ML implementation project.
Work with hybrid-computing patterns, advanced MPI and OpenMP, and accelerators such as FPGAs; apply them to climate and terrestrial-systems modelling using hybrid programming approaches.
Survey neuromorphic and quantum computing and the challenges of post-exascale computing, anticipating the future direction of supercomputing.
IE's method is collaborative, active and applied. The 150-hour workload (6 ECTS) is distributed across lectures, discussion, in-class and asynchronous exercises, group work and individual study. Grading blends continuous assessment with two exams.
Deliverable: active, informed contribution to discussions and in-class activities across the semester.
Evaluated on: quality and consistency of engagement; attendance is mandatory and feeds this component.
Deliverable: one individual assignment per module applying lecture concepts to a real problem or case study.
Evaluated on: correctness, applied understanding and clarity of the solution.
Deliverable: regular short quizzes plus an intermediate exam checking comprehension of recent lectures.
Evaluated on: progressive mastery; designed to reinforce continuous learning.
Deliverable: a group project on a selected HPC topic — a written paper plus an oral presentation (Session 30).
Evaluated on: the design, implementation and optimisation of an HPC solution, and the quality of the presentation.
Deliverable: a written individual exam held mid-semester covering the first half of the course (Modules 1–3).
Evaluated on: theoretical understanding of the foundational and parallel-essentials material.
Deliverable: a comprehensive written exam at the end of the course (Session 30) spanning all six modules.
Evaluated on: both theoretical and applied understanding; the single largest component.
Every numbered session from the syllabus, grouped by module. Live in-person sessions carry a Live marker; self-paced ones a Async marker. Tags flag the parallel-computing tools each session uses — the same MPI / OpenMP / CUDA stack the MiniWeather stencil project in this repo implements four ways.
The groundwork: the evolution, principles and architecture of HPC systems, resource management, performance metrics, cloud-based HPC and a first pass at writing simple parallel codes. This module answers the orienting questions — what makes a machine “high performance,” how those machines are organised, how their time is shared between many users, and how you log in and run your first parallel job.
Lay the groundwork for the whole course: structure, assignments, grading and class dynamics. Core HPC concepts, the anatomy of a supercomputer, key performance indicators and a short history of supercomputing.
What HPC is — aggregating many processors, fast memory and a low-latency interconnect to solve one problem far faster than a single machine could. Supercomputer anatomy — compute nodes, accelerators, a high-speed network (InfiniBand / Slingshot), a parallel filesystem and a login/scheduler layer. Key performance indicators — peak vs. sustained FLOP/s, memory bandwidth, and interconnect latency/bandwidth. History — from Cray vector machines through Beowulf commodity clusters to today’s GPU-accelerated exascale systems (Frontier, LUMI, Leonardo).
HPL (LINPACK) performance, which is always below the theoretical peak.Read: Sterling et al., ch. 1–2 — a comprehensive, accessible orientation to what supercomputers are and why they matter; sets vocabulary used for the rest of the course.
Demystify the parallel-architecture families through Flynn's taxonomy and the technologies enabling supercomputing today, ending on multiprocessors and heterogeneous computing.
Flynn’s taxonomy classifies machines by how many instruction and data streams run at once — SISD, SIMD, MISD and MIMD. Architecture families span shared-memory SMPs, distributed-memory clusters and vector/SIMD units. Heterogeneous computing pairs general-purpose CPUs with throughput-oriented accelerators (GPUs) on the same node.
Read: Sterling et al., ch. 3–4 (architecture); Intro to HPC for Scientists & Engineers, ch. 1 — a concise tour of mainstream parallel-computer architecture and where the performance comes from.
Operational HPC: job scheduling strategies, resource allocation and the performance benchmarks that keep parallel environments running efficiently.
Job scheduling — a batch scheduler (SLURM, PBS) queues jobs and matches their resource requests (nodes, cores, GPUs, walltime) to free hardware, balancing throughput against fairness. Performance benchmarks — HPL/LINPACK stresses dense floating-point; HPCG stresses sparse, memory-bound kernels; STREAM measures memory bandwidth — together they bracket how a real code will behave.
*.sbatch / *.slurm scripts for a Magic Castle cluster — job scheduling in practice.Read: Sterling et al., ch. 5 (resource management) and the SLURM quickstart documentation — the operational backdrop for every later hands-on session.
How cloud computing reshaped HPC accessibility and scalability: virtualization basics, cloud service models, and the benefits and challenges of cloud HPC in scientific workflows.
Virtualization lets one physical machine present many isolated virtual ones; lightweight containers (Singularity/Apptainer, Docker) package an application’s whole software stack for reproducibility. Service models — IaaS, PaaS and SaaS — trade control for convenience. Trade-offs — cloud gives elastic capacity and zero capital cost but adds virtualization overhead, slower interconnects and egress fees that can hurt tightly-coupled MPI jobs.
Read: Sterling et al., ch. on cloud & commodity clusters; vendor HPC whitepapers (AWS ParallelCluster, Azure CycleCloud) — concrete cloud-HPC reference architectures.
Set up HPC environments and write first parallel codes, with examples from health and neuroscience research. Includes the individual and group assignment explanation.
Environment setup — load compiler and MPI modules (module load), build with mpicc/nvcc, and submit through the scheduler. First parallel codes — a “hello, ranks” MPI program and a simple OpenMP loop that establish the mental model of many workers cooperating. Health & neuroscience cases — genomics pipelines, medical-image reconstruction and large-scale brain simulation show why this compute matters.
Read: Robey & Zamora, ch. 1–2 — a hands-on on-ramp to building and running parallel code, ideal for the first assignment.
Distributed vs. shared memory, MPI and OpenMP, GPU computing with OpenACC/CUDA, and a CFD case study integrating MPI + OpenMP — the heart of the parallel-programming skillset the MiniWeather project exercises. This is where the abstract architectures of Module 1 become code you actually write: decomposing a problem, communicating between workers, and choosing the right paradigm for the hardware in front of you.
The core architectures of parallel computing: distributed vs. shared memory, their advantages, challenges and suitable scenarios, and how each shapes programming paradigms and performance.
Shared memory — all cores see one address space, so communication is just reading the same variable, but synchronization and cache coherence become the bottleneck (the OpenMP model). Distributed memory — each node owns private memory and must explicitly send messages to share data (the MPI model), which scales to thousands of nodes at the cost of programmer effort. Trade-offs centre on the cost of communication versus the cost of synchronization.
1/(s + p/N) for a fixed problem with serial fraction s; Gustafson’s law observes that in practice you grow the problem with N, so weak scaling stays useful well past Amdahl’s pessimistic ceiling.halo.cpp) is the distributed-memory boundary problem made concrete.Read: Robey & Zamora, ch. 3–4; Intro to HPC for Scientists & Engineers, ch. on parallel computers — clear treatment of the two memory models and the scaling laws.
MPI from basic to intermediate: communication patterns, data distribution and collective operations, with hands-on practice writing and running MPI programs on distributed-memory systems.
Point-to-point — MPI_Send/MPI_Recv (and their non-blocking MPI_Isend/MPI_Irecv forms) move data between two named ranks. Collectives — MPI_Bcast, MPI_Scatter, MPI_Gather, MPI_Reduce, MPI_Allreduce coordinate all ranks at once and are implemented with optimised tree algorithms. Data distribution — splitting a domain so each rank owns a contiguous block keeps communication local to neighbours.
stencil_cpu_parallel.cpp partitions the 3D grid across MPI ranks and exchanges halo layers each step.Read: Robey & Zamora, ch. 8 (MPI); the MPI Forum standard / Using MPI reference for the call signatures used in the lab.
Shared-memory parallelism with OpenMP directives: workload distribution, synchronization and memory management for multicore processors, with interactive performance experiments.
Directives — #pragma omp parallel for spreads loop iterations across a team of threads sharing memory. Workload distribution — the schedule clause (static, dynamic, guided) trades load-balance against overhead. Synchronization — critical, atomic and reduction prevent two threads from clobbering the same memory. Scaling is limited by memory bandwidth and false sharing, not just core count.
static when every iteration costs the same (best cache reuse, least overhead) and dynamic/guided when iteration cost is uneven — at the price of extra runtime bookkeeping.stencil_cpu_parallel.cpp threads across cores with OpenMP inside each MPI rank.Read: Robey & Zamora, ch. 7 (OpenMP); the OpenMP API examples document — directive-by-directive walkthroughs.
GPU architecture and programming with CUDA and OpenACC: develop and optimize parallel algorithms that exploit the massive parallelism of GPUs for compute-intensive tasks.
GPU architecture — thousands of lightweight cores grouped into streaming multiprocessors, optimised for throughput over latency. CUDA exposes this explicitly: you write a kernel launched over a grid of thread blocks, where threads in a block share fast on-chip memory. OpenACC takes a directive-based shortcut (#pragma acc) that the compiler turns into GPU code, trading control for productivity.
stencil_gpu.cu maps each grid cell to a CUDA thread with coalesced loads and shared-memory tiling.Read: Robey & Zamora, ch. 9–12 (GPU/CUDA/OpenACC); the CUDA C++ Programming Guide, intro chapters.
Apply parallel computing to CFD: engage with simulations using MPI and OpenMP together, gaining practical experience in hybrid parallel programming across distributed and shared memory.
CFD discretises the governing fluid equations onto a grid and advances them step by step — a textbook HPC workload because each cell depends only on its neighbours. Hybrid MPI + OpenMP — MPI distributes the grid across nodes while OpenMP threads the work within each node, matching the two-level structure of modern clusters (many nodes, many cores per node).
Read: Robey & Zamora, ch. on hybrid programming; the original MiniWeather mini-app README for a worked CFD-style stencil.
Optimizing code for HPC architectures: profiling and analysis, checkpointing, the memory hierarchy and data locality, high-performance libraries, parallel I/O and parallel filesystems, with cluster performance tuning. The recurring lesson of this module is that on modern hardware most scientific codes are limited by data movement, not arithmetic — so optimization is largely about keeping the right data close to the processor at the right time.
Strategies to fully exploit HPC architectures: code profiling, algorithmic choices and data-structure optimization, with loop unrolling, vectorization, memory-access patterns and cache utilization.
Loop unrolling reduces loop-control overhead and exposes more independent work to the pipeline. Vectorization (SIMD) packs several array elements into one wide register so a single instruction processes 4–16 values at once. Memory-access patterns — stride-1, contiguous access lets the hardware prefetch and fully use each cache line. Cache utilization is the master variable: a kernel that streams data once is fundamentally slower than one that reuses it.
min(peak FLOP/s, bandwidth × arithmetic intensity).stencil_cpu_blocked.cpp tiles the loops so each block fits in L1/L2 — same FLOPs, far fewer cache misses.Read: Intro to HPC for Scientists & Engineers, ch. on optimization & the memory hierarchy — the definitive treatment of single-node tuning; Barba & Forsyth for the Python angle.
Tools and methodologies for profiling CPU and memory performance, plus checkpointing for fault tolerance in long-running computations — identifying and mitigating bottlenecks.
Profiling tools (perf, gprof, Intel VTune, NVIDIA Nsight) sample where time and cache misses actually occur — replacing guesswork with evidence. Bottleneck analysis follows Amdahl: optimise the part that dominates the runtime, not the part that is easiest. Checkpointing periodically saves application state to disk so a multi-day job can restart after a node failure instead of starting over.
timer.cpp and profiling/ directory are where each backend's runtime is measured.Read: Robey & Zamora, ch. on profiling tools; tool docs for perf and Nsight Systems — the practical reference for the profiling assignment.
Principles of the memory hierarchy from registers to disk, strategies to maximize data locality, and the high-performance scientific libraries that provide optimized math primitives.
Memory hierarchy — registers, L1/L2/L3 cache, DRAM, then disk, each roughly an order of magnitude larger but slower than the last. Data locality — temporal (reuse data before it is evicted) and spatial (use neighbouring data already in the cache line) — is what keeps the fast levels busy. High-performance libraries — BLAS, LAPACK, FFTW, cuBLAS — encapsulate decades of tuning so you rarely beat them by hand.
dgemm (matrix multiply) can run at >90% of peak FLOP/s; a naive triple loop reaches a few percent. Reach for the library before writing the loop.Read: Intro to HPC for Scientists & Engineers, memory-hierarchy chapter; the BLAS/LAPACK and FFTW user guides.
Parallel I/O challenges and solutions: parallel filesystem architecture, best practices for scalable I/O, and managing large datasets in distributed HPC environments.
Parallel I/O lets many ranks read or write one shared file at once through MPI-IO and self-describing formats (HDF5, NetCDF, ADIOS) rather than each rank opening its own file. Parallel filesystems (Lustre, GPFS/Spectrum Scale, BeeGFS) stripe a file across many storage servers so aggregate bandwidth scales with the cluster.
Read: Sterling et al., storage & I/O chapters; the HDF5 and Lustre best-practices guides.
Apply optimization in a real scientific context: case studies in computational chemistry and physics, with assignments tuning simulation-code performance on HPC clusters.
Computational chemistry & materials — molecular dynamics (GROMACS, LAMMPS) and electronic-structure codes (VASP, Quantum ESPRESSO) are among the largest consumers of supercomputer time. Cluster tuning — the assignment applies this module’s techniques to a real simulation: profile it, fix the dominant bottleneck, and document the speedup with a scaling study.
Read: domain mini-app docs (GROMACS / LAMMPS performance guides); Robey & Zamora’s scaling-study chapter for the experimental method.
Scalable parallel algorithms for big data, high-performance data structures and visualization, and the fundamentals of distributed ML and deep learning at scale — culminating in a distributed-ML project. This module turns the parallel-computing machinery of Modules 2–3 toward data-intensive and AI workloads, the fastest-growing use of supercomputers today.
Designing algorithms that scale across many processing units, centred on the MapReduce model for distributed data processing, with real-world big-data case studies.
Scalable algorithms minimise communication and synchronization so adding nodes keeps paying off. MapReduce expresses a computation as a map (transform records in parallel) followed by a reduce (aggregate by key), with the framework (Hadoop, Spark) handling distribution, shuffling and fault tolerance. Big data case studies — log analysis, indexing, ETL — show the pattern at web scale.
Read: Dean & Ghemawat’s original MapReduce paper; Robey & Zamora’s data-parallel-algorithms chapter.
Data structures that maximize efficiency in parallel and distributed environments, plus the principles and tools of scientific visualization for interpreting complex HPC datasets.
HP data structures — cache-friendly layouts (structure-of-arrays over array-of-structures), space-filling curves and distributed hash tables keep parallel access contention-free. Scientific visualization — turning multi-gigabyte fields into images and isosurfaces with tools such as ParaView and VisIt, often rendered in parallel in situ while the simulation runs.
Read: Robey & Zamora’s data-layout chapter; the ParaView guide for the visualization workflow mirrored in this repo.
Foundations of distributed ML: data parallelism, model parallelism and strategies for scaling ML across multiple nodes, plus the frameworks and libraries that enable it.
Data parallelism replicates the model on every worker, feeds each a different shard of the batch, and averages gradients with an all-reduce — the most common strategy. Model parallelism splits a model too large for one device across several (tensor and pipeline parallelism). Frameworks — PyTorch DDP/FSDP, Horovod, DeepSpeed — implement these patterns over MPI-style collectives.
MPI_Allreduce on the gradients every step, so the same interconnect and collective-algorithm concerns from Module 2 govern how well training scales.Read: the Horovod and PyTorch-Distributed documentation; survey papers on data vs. model parallelism.
Scaling deep-learning models on HPC: training large neural networks with gradient accumulation, batch-size scaling and accelerators such as GPUs and TPUs.
Gradient accumulation sums gradients over several micro-batches before updating, simulating a large batch on limited memory. Batch-size scaling trades a larger effective batch (more parallelism) against optimisation quality, usually managed with a learning-rate warmup. Accelerators — GPUs and TPUs with mixed-precision (FP16/BF16) tensor cores — supply the raw throughput.
Read: Goyal et al. “Accurate, Large Minibatch SGD”; the DeepSpeed/ZeRO documentation.
Apply distributed-ML and deep-learning-at-scale concepts in a hands-on implementation of a distributed machine-learning model.
Bring it together: take a model and dataset, distribute training across multiple GPUs or nodes, and measure the speedup and accuracy trade-offs. The deliverable is a working distributed-training run plus a short scaling analysis — the same strong/weak-scaling discipline from Module 3 applied to ML.
Read: the framework tutorials selected for your stack (PyTorch DDP / Horovod); revisit Module 4 sessions 18–19.
Hybrid-computing patterns, advanced MPI and OpenMP, and accelerators like FPGAs — applied to climate and terrestrial-systems modelling, the domain MiniWeather itself belongs to. Where Module 2 taught each paradigm in isolation, this module is about composing them and squeezing out the last increments of performance on the largest machines.
target device offload — beyond simple parallel loops.Where multiple parallel paradigms coexist in one application: common hybrid patterns integrating MPI with OpenMP and GPU computing, shown through case studies.
Hybrid patterns map each paradigm onto the level of hardware it fits best: MPI between nodes, OpenMP among the cores of a node, and CUDA/OpenACC on the GPU within a node. Integration requires care at the seams — e.g. ensuring MPI is initialised for thread support (MPI_THREAD_MULTIPLE) and that GPU buffers can be sent directly (GPU-aware MPI).
Read: Robey & Zamora’s hybrid-programming chapter; case studies of MPI+OpenMP+CUDA codes (e.g. the MiniWeather and other DOE mini-apps).
Beyond the basics: dynamic process management, one-sided communications and persistent communication requests for optimizing large-scale parallel applications.
Dynamic process management spawns or connects ranks at runtime for elastic or master/worker workloads. One-sided communication (RMA: MPI_Put/MPI_Get) lets a rank access a neighbour’s memory window without that rank posting a matching receive, decoupling the two. Persistent requests set up a repeated communication pattern once and reuse it, cutting per-message overhead in iterative codes.
Read: Using Advanced MPI (Gropp et al.); the MPI-3/4 standard sections on RMA and persistent collectives.
Task-based parallelism, SIMD directives and device-memory management for GPU accelerators — enhancing the performance and scalability of shared-memory applications.
Task parallelism (#pragma omp task) expresses irregular, recursive or producer/consumer work that doesn’t fit a simple parallel loop. SIMD directives (#pragma omp simd) tell the compiler a loop is safe to vectorise. Device memory & offload (#pragma omp target) move data to and run kernels on a GPU using the same OpenMP model — a portable alternative to CUDA.
target offload lets a single annotated source target multicore CPUs and GPUs alike, trading a little peak performance for portability across vendors.Read: the OpenMP 5.x specification chapters on tasks and device constructs; tutorials on target offload.
FPGA architecture and programming models, plus other specialized processors in HPC, and how to select the right accelerator for a given workload.
FPGAs are reconfigurable chips whose logic you tailor to one algorithm, achieving high performance-per-watt for fixed, streaming dataflow. Programming models — HLS (High-Level Synthesis) and OpenCL — raise FPGA development above raw hardware description. Specialised processors — TPUs, vector engines, AI ASICs — each win on a narrow workload. Selection is a matching problem: data-parallel and floating-point heavy → GPU; fixed, low-latency streaming → FPGA/ASIC.
Read: Sterling et al., accelerators chapter; vendor HLS / OpenCL-for-FPGA introductions.
Apply advanced parallel programming to climate and terrestrial-systems modelling, integrating MPI and OpenMP and possibly GPU accelerators or FPGAs to enhance performance.
Apply the whole module to an environmental model: a grid-based atmosphere/land simulation parallelised with hybrid MPI + OpenMP and, optionally, GPU or FPGA acceleration. The exercise mirrors how production weather and climate codes (WRF, E3SM, ICON) are actually built and scaled.
Read: the MiniWeather mini-app paper/README; overview articles on WRF or E3SM parallelisation.
The future: neuromorphic and quantum computing, the post-exascale era, a pre-exam review, and the final exam with group-project presentations. Having mastered today’s machines, the module steps back to ask where the field is heading once Moore’s-law scaling of conventional silicon runs out.
Brain-inspired computing: the design and application of neuromorphic systems that mimic neural architectures for efficient sensory processing and machine learning, with their potential and limits.
Neuromorphic systems (Intel Loihi, SpiNNaker, IBM TrueNorth) implement spiking neural networks directly in hardware, computing only when a neuron “fires.” This event-driven, in-memory style is extraordinarily energy-efficient for sparse, sensory and edge workloads. Limitations — a young software stack and a narrow class of well-suited problems.
Read: survey articles on Loihi/SpiNNaker; Sterling et al., emerging-architectures discussion.
The basics of quantum computing — qubits, quantum gates, entanglement — plus quantum algorithms and their applications in cryptography, optimization and simulation.
Qubits hold a superposition of 0 and 1; n qubits span a 2n-dimensional state, the source of quantum parallelism. Gates are reversible unitary operations; entanglement correlates qubits so they can no longer be described independently. Algorithms — Shor (factoring), Grover (search), and quantum simulation — target problems classically intractable, though today’s noisy devices (NISQ) limit practical scale.
Read: Nielsen & Chuang, introductory chapters; the Qiskit textbook for a hands-on view of gates and algorithms.
Beyond exascale: emerging architectures, software paradigms and the integration of AI and big-data analytics into HPC workflows, and the considerations driving the next generation.
Post-exascale — with the first exaflop machines (Frontier, El Capitan, JUPITER in Europe) here, the frontier shifts from peak FLOP/s to energy efficiency, resilience and usability. Emerging architectures — chiplets, near-/in-memory compute, optical interconnects. AI–HPC convergence — simulation and learned surrogate models increasingly run in the same workflow, blurring the line between the two communities.
Read: EuroHPC and US Exascale Computing Project reports; recent TOP500/Green500 commentary.
Synthesize the course: clarify doubts, revisit challenging topics and consolidate knowledge across all modules in preparation for the final examination.
Consolidate the full arc — from supercomputer anatomy through MPI/OpenMP/CUDA, performance optimization, distributed ML and the frontiers — clarifying doubts and connecting threads across modules in preparation for the final exam.
Review: the Key concepts glossary below and your per-module assignments.
The final session: a written exam plus presentation of group projects, where students demonstrate mastery through the design, implementation and optimization of HPC solutions for real-world problems.
Demonstrate mastery: a written exam covering all six modules plus an oral presentation of the group project — the design, implementation and optimisation of an HPC solution to a real-world problem, with results and a scaling analysis.
The recurring vocabulary of high-performance computing, gathered in one place for revision. Each term is defined in a sentence or two; most map directly to a session above and to a part of the MiniWeather companion project.
1/(s + p/N) by its serial fraction s — the limit of strong scaling.target, GPUs).static (even, low overhead), dynamic/guided (load-balanced, more overhead).min(peak FLOP/s, bandwidth × arithmetic intensity), showing whether a kernel is compute- or memory-bound.Each title is annotated with what it covers and the sessions it best supports, so the reading list doubles as a study map.
The course’s spine: a comprehensive, accessible treatment of HPC from supercomputer anatomy and architecture through resource management, I/O and emerging hardware — fundamentals plus practical skills for domain scientists.
Sessions 1.1–1.4 · 3.3–3.4 · 5.4 · 6.1–6.3The hands-on companion: evaluating hardware, then writing real code with OpenMP, MPI and GPUs (CUDA/OpenACC), including data layout, profiling and a GPU tsunami simulation — the most directly applicable text for the labs and the MiniWeather backends.
Sessions 1.5 · 2.1–2.5 · 3.1–3.2 · 4.1–4.2 · 5.1Written by HPC-centre practitioners: the sharpest treatment of single-node performance — architecture, the memory hierarchy, cache behaviour and the optimisation strategies (including the roofline mindset) that drive Module 3.
Sessions 1.2 · 2.1 · 3.1–3.3Optimising Python for numerical and data-intensive work — profiling, vectorisation with NumPy, multiprocessing and GPU offload — a gentle entry point to performance thinking and useful for the distributed-ML strand.
Sessions 3.1–3.2 · 4.3–4.5